Various known methods for fabricating hybrid substrates include steps for bonding donor substrates onto receiver substrates and then for removing a remainder portion of the donor substrate in order leave a transfer layer portion of the donor substrate bonded to the receiver substrate. To improve bonding, an intermediate layer (a bonding layer) is often formed between the donor and receiver substrates. A resulting hybrid substrate then comprises in succession the transfer layer having thicknesses typically between 0.01 micrometers (μm) and a few μm, an intermediate having thicknesses typically between 0.01 μm and 1 μm; and the receiver substrate having thickness typically of several hundreds of μm.
Techniques for removing the remainder (or rear) portion of the donor substrate include grinding and/or chemical etching. Further techniques include, prior to bonding, forming a zone of weakness inside the donor substrate, then removing the remainder portion of the donor substrate by fracturing along the zone of weakness. The zone of weakness can be formed by implanting atomic species, such as hydrogen and/or rare gases, according to techniques known under the trademark of SMART-CUT®. The zone of weakness can also be formed by creating a porous zone according to techniques known under the trademark of ELTRAN®. See, e.g., Celler et al., 2003, Frontiers of Silicon-on-insulator, J. App. Physics 93:4955-4978.
Semiconductor-on-insulator (SeOI) substrates, especially silicon-on-insulator (SOI) substrates, can be fabricated by such known methods. During fabrication, an insulating layer is formed on the face of one or both substrates (by, e.g., thermal oxidation or oxide deposition) and it the also serves as a bonding layer when the substrate faces are put together during the bonding step. In the final hybrid substrate, the insulating layer is buried. In such layer transfer techniques, the quality of the resulting hybrid substrate directly depends on the quality of the bonding. A high bonding energy, this is the energy with which two substrates are bonded together, is important during the subsequent step of removing the remainder portion of the donor substrate. Bond energy and bond quality are known to be determined by properties of the substrate bonding surfaces, e.g., by planeness, by particles contaminants, by roughness, and by hydrophilicity.
Bond energy and quality are known to be improved by an intermediate layer (a bonding layer) with sufficient thickness, i.e. greater than 50 nanometers (nm), between two bonding faces of the two substrates. In particular, the bond quality is improved because there are fewer bond defects, e.g. blisters. See, e.g., Q. Y. Tong and U. Gösele, Semiconductor wafer bonding science and technology, published by John Wiley & Sons, New York (1999). Thus, the buried insulating layer in SeOI type substrates can serve both to insulate, to facilitate bonding, and to limit bonding defects.
However, in certain applications, any buried insulating layer should be at least limited to thicknesses less than about 50 nm or preferably even eliminated. Such application include those in which a high heat conduction between the transferred layer (in which microelectronic components can be formed) and the receiver substrate is advantageous. Bonding without a buried insulating layer (i.e. direct bonding) can also be advantageous in applications needing improved electrical conduction between the transfer layer and the receiver substrate. Additionally, it can also be advantageous to direct bond a receiver substrate of silicon covered and a transfer layer that is elastically stressed in tension or in compression, e.g., a layer of strained silicon, or of germanium, or of silicon-germanium
Further, direct bonding can also be advantageous in applications in which the transfer layer and the receiver substrate have different crystal orientations. For example, in complementary metal oxide semiconductor (CMOS) type components, NMOS elements can be fabricated in a (100) silicon layer, while PMOS elements can be fabricated in a (110) silicon layer. See, e.g., K. L. Saenger et al. “Amorphization/templated recrystallization method for changing the orientation of single-crystal silicon: an alternative approach to hybrid orientation substrates”, Appl. Phys. Lett., 87, 221911 (2005), and C. Y. Sung et al. “High performance CMOS bulk technology using direct silicon bond (DSB) mixed crystal orientation substrates”, Tech. Dig.—Int. Electron Devices Meet., 2005, 236.
Direct bonding techniques are known and include hydrophilic bonding and hydrophobic bonding techniques. Hydrophilic bonding of silicon to silicon includes, prior to placing the substrate bonding surface into intimate contact, hydrophilic cleaning of the bonding surfaces. Hydrophilic cleaning is typically performed by the “RCA” method during which the bonding surfaces are exposed first to standard clean 1 (SC1) solution and then first to standard clean 2 (SC2) solution. SC1 solution comprises a mixture of ammonium hydroxide (NH4OH), hydrogen peroxide (H2O2), and deionized water; SC2 solution comprises a mixture of hydrochloric acid (HCl), hydrogen peroxide (H2O2), and deionized water. See, e.g., C. Maleville, O. Rayssac, H. Moriceau et al., in Proc. 4th Internat. Symposium on Semiconductor Wafer Bonding: PV97-36, ECS publications, p. 46, 1997.
Hydrophobic bonding of silicon to silicon includes, prior to placing the substrate bonding surfaces into intimate contact, hydrophobic cleaning of the bonding surfaces. Hydrophobic cleaning is typically performed by exposing the bonding surface to a bath of hydrofluoric acid (HF) (known in the art as “HF last” cleaning), or cleaning in HF vapor, or annealing in an ultra-high vacuum (UHV). In the HF last cleaning technique, exposure to a HF bath is usually followed by rather complex rinsing and drying steps. Further, because the surfaces then become reactive to metallic and particle contaminants, special precautions are advantageous to avoid such contamination. See, e.g., M. J. Kim and R. W. Carpenter, “Heterogeneous silicon integration by ultra-high vacuum wafer bonding”, Journal of Electrochemical Materials, Vol. 32, No. 8, 2003.
However, for the following reasons, it has been difficult to achieve sufficient bond quality in routine commercial or industrial application of known direct bonding techniques such as hydrophilic or hydrophobic bonding. See, e.g., S. L. Holl et al., “UV activation treatment for hydrophobic wafer bonding”, Journal of the Electrochemical Society, 153 (7), G613-G616 (2006). Hydrophobic bonding using the HF last cleaning technique is rather complex and prone to contamination. UHV annealing requires the use of expensive equipment. Further, to achieve bond strength, both hydrophilic and hydrophobic cleaning techniques are advantageously followed by thermal annealing in the range 200° C. to 1200° C. for a few, e.g. 2, hours (h). But annealing at high temperatures may not be possible for certain subsequent applications. It may even not be advantageous to exceed 200° C.
Also, after annealing in the range 200° C. to 1100° C., bubbles have been observed in both hydrophilic or hydrophobic bonding interfaces by infrared transmission techniques. Such bubbles may be due to desorption of species remaining at the bonding surfaces regardless of the cleaning technique. And, after annealing in the range 1100° C. to 1200° C., bond defects are known to exist even though infrared-visible bubbles are rate or absent. These defects may be observable by the acoustic microscopy technique. See, e.g., R. D. Horning and R. R. Martin, “Wafer-to-wafer bond characterization by defect decoration etching”, Second International Symposium on Semiconductor Wafer Bonding: Science Technology and Applications, PV93-29, p 199, 1993.
Methods known for obviating defects observed after direct bonding include, for example, creating trenches to promote escape of desorbed gases or performing a desorption step prior to bonding. However, such methods are not fully satisfactory and are not always suitable if certain types of electronic components are to be fabricated. See, e.g., R. H. Esser, K. D. Hobart, and F. J. Kub, “Improved low temperature Si—Si hydrophilic wafer bonding”, Journal of the Electrochemical Society, 150(3), G228-G231 (2003).
Thus, improvements over these prior art techniques are needed.